The present invention relates to precharge circuits for precharging a signal line by applying a predetermined voltage before applying an image signal to the signal line and also to image display devices using the same.
The liquid crystal display device of an active matrix drive type is one of well-known conventional image display devices. The liquid crystal display device is, as FIG. 36, constituted by a pixel array ARY, a scan signal line drive circuit GD, a data signal line drive circuit SD, and a precharge circuit PC. The pixel array includes numerous scan signal lines GL (GL1 to GLj; will be referred collectively to GL) and data signal lines SL (SL1 to SLj; will be referred collectively to SL) crossing each other and pixels PIX which are located in individual segments surrounded by two adjacent scan lines GL and two adjacent data signal lines SL and arranged in a matrix.
The data signal line drive circuit SD samples the incoming video signal DAT in synchronism with an externally provided clock signal CKS and other timing signals, amplifies the samples as required, and writes them to the data signal lines SL. The scan signal line drive circuit GD sequentially selects the scan signal lines GL in synchronism with a clock signal CKG and other timing signals and controls the opening/closing of the switching elements in the pixels PIX, thereby writing to the pixels PIX the video signal (data) written to the data signal lines SL as explained above and causing the data written to the pixels PIX to be held.
The precharge circuit PC writes a precharge voltage across the data signal lines during a period (precharge period) which comes before the data signal line drive circuit SD writes data to the data signal lines SL and in which the scan signal line drive circuit GD selects no scan line GL, in response to externally supplied precharge control signals PCTL, PCTLB, etc. as disclosed in Japanese Laid-Open Patent Application No. 7-295521/1995 (Tokukaihei 7-295521; published Nov. 10, 1995). Thereby, charge and discharge are reduced during the writing of data to the data signal line SL by the data signal line drive circuit SD, and fluctuations in the potential of the image signal line (data signal line) are restrained.
In the liquid crystal display device as mentioned above, control and other kinds of signals (clock signals CKS/CKG, start signals SPS/SPG, precharge control signal PCTL, etc.) are externally provided directly to the data signal line drive circuit SD, the scan signal line drive circuit GD, and a precharge circuit PC with the same amplitude as the power supply voltage (VDD) of the respective circuits.
Meanwhile, in recent years, technologies whereby the pixel array ARY and drive circuits SD and GD, instead of being fabricated on separate integrated circuit chips and mounted on a panel afterwards, are integrated on a panel on which the pixel array ARY is fabricated have caught wide interest for the purposes of miniaturisation, resolution improvement, and packaging cost reduction of the liquid crystal display device. In the liquid crystal display device with a built-in drive circuit, the substrate needs to be transparent (when used as a component in a transparent liquid crystal display device that is now widely used), and therefore, polycrystalline silicon thin film transistors, which can be formed on a quartz or glass substrate, are often used as active elements.
Incidentally, the liquid crystal display device with a built-in drive circuit employing polycrystalline silicon thin film transistors exhibits inferior transistor characteristics to monocrystalline silicon transistors fabricated from the aforementioned integrated circuit chips. Particularly, the absolute value of the threshold voltage is as high as 1V to 6V, which inevitably increases the drive power supply voltage to a high value around 15V to 20V.
Under these circumstances, externally supplied control signal and the like need to have a large amplitude too. This would cause power consumption in external circuits such as a control circuit for producing a control signal. Another resultant big problem would be undesirable radiation from signal lines. Accordingly, a suggestion is made to solve these problems by mounting a signal voltage booster circuit (level shifter circuit) on the circuit side of the liquid crystal display device to fill in the requirement for the aforementioned high drive power supply voltage VDD in the panel, while maintaining the low voltage across the input/output interface.
The present invention has an object to provide a precharge circuit with a capability to reduce power consumption and also to provide an image display device with a capability to reduce in size and mounting costs and improve resolution by incorporating the precharge circuit.
A precharge circuit in accordance with the present invention, in order to accomplish the object, is for precharging a signal line to a predetermined voltage before applying a video signal to the signal line and is characterized by the following arrangement.
The precharge circuit is characterised in that it includes a precharge control circuit which operates during a shorter period, encompassing a precharge period not coinciding with a drive period of the signal line, than an effective display period in a horizontal period and which effects such control to output the predetermined voltage.
According to the invention, after the signal line is precharged to a predetermined voltage, a video signal is applied to the signal line.
Conventionally, the precharge circuit operates throughout the time. A constant current flows in the precharge circuit even during non-precharge periods as long as the precharge circuit is operating, which results in an increase of power consumption in the precharge circuit.
In contrast, in the present invention, a precharge control circuit is provided which operates during a shorter period, encompassing a precharge period not coinciding with a drive period of the signal line, than an effective display period in a horizontal period; therefore, the precharge voltage is output only during active periods of the precharge circuit. Due to this control, the constant current no longer flows in the precharge circuit during non-active periods. Power consumption is limited only to active periods, which restrains increases in power consumption in the precharge circuit with corresponding certainty.
Preferably, the precharge control circuit controls the precharging based on an externally supplied, low-amplitude external input signal which has an amplitude lower than that of a drive voltage of the precharge circuit and which maintains the amplitude during the precharge period.
In this event, an external circuit only needs to supply to the precharge control circuit an external input signal with an amplitude lower than that of a drive voltage of the precharge circuit, thereby enabling the load and power consumption in the external circuit to be reduced. This ensures the provision of a low voltage interface.
Preferably, the precharge control circuit includes a level shifter circuit, which is activated during a period in which an input of the low-amplitude external input signal is required, for level-shifting the low-amplitude external input signal.
In this event, the level shifter circuit becomes active during the precharge period and the period during which an input of the low-amplitude external input signal is required; therefore, it is ensured that the precharging is controllable only during the precharge period based on the external input signal with an amplitude lower than that of the drive voltage of the precharge circuit.
Preferably, the level shifter circuit is of a current drive type. Level shifter circuits can be divided into two major categories: voltage drive type and current drive type. The voltage drive type does not require a constant current and therefore boasts low power consumption. However, its operation is dictated by threshold values of the switching elements included in the circuit, and the operation margin for switching element characteristics is narrow. The current drive type requires a constant current and therefore has a disadvantage of relatively large power consumption. However, it has an advantage of a wide operation margin for the characteristics of the switching elements included in the circuit. For instance, the polycrystalline properties render it difficult to impart uniform threshold values and movability to all the transistors in the circuit. Therefore, the use of a level shifter circuit of a current drive type solve these problems, because it offers a wide operation margin.
For a fuller understanding of the nature and advantages of the invention, reference should be made to the ensuing detailed description taken in conjunction with the accompanying drawings.